Xinmai Technologies' H.264 video codec, written based on hardware description languages, runs as an IP core on FPGA devices. FPGA-based solutions use FPGAs as core devices to implement H.264 codec IP cores. This is a pure hardware solution with negligible startup time and an encoding latency of 0.5ms.

ASSP architectures are inflexible, while systems based on FPGA-microprocessor combinations are larger but more flexible. Historically, designers had no choice but to repeatedly weigh the trade-offs between these two options when creating IP-based streaming video systems with small PCB footprints. Integrating a soft-core microprocessor into an FPGA eliminates the need for separate processors and DRAM, but the performance of the resulting system might not compare to solutions built around external ARM® processors, which may also include USB, Ethernet, and other useful peripherals. With the advent of [Xilinx](http://www.eepw.com.cn/news/listbylabel/label/%E8%B5%9B%E7%8